A memory device of the three-dimensional structure has been proposed. The memory device includes a stacked body of a plurality of electrode layers stacked with spacing. The electrode layer functions as a control gate in a memory cell. A memory hole is formed in the stacked body. A silicon body constituting a channel is provided on the sidewall of the memory hole via a charge storage film.
There is concern in device manufacturing about the increase of the amount of warpage of the support substrate (silicon substrate) due to the increase of stress by the aforementioned stacked body.